The ADC-2CH-4G-12 is a two channel, 4 GSPS, 12-bit analog converter, with an integrated MIL-DTL-38999. The JESD 204B I/O devices are to be directly coupled to a host FPGA. The four channel ADC (x2) devices connect through the high bandwidth connector to a FPGA-based host board which maximizes data throughput and minimizes latency.
The ADC-2CH-4G-12 supports an onboard programmable sample clock generator as well as an external reference input. Multiple ADC-2CH-4G-12 can be synchronized to increase the number of input channels through the use of trigger input/output signals directly under the control of the FPGA.
ANALOG INPUT The ADC-2CH-4G-12 supports four inputs through 50Ω MMCX type front panel connectors. The analog inputs are single-ended and are coupled to TI ADC12J4000 ADCs using a balun and AC coupling capacitor configuration to produce the broadband differential input required by the devices.